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dh/sidh: Avoid reference to global variable with MULX for rdcP751.
See bug in the compiler (issue #58735).
1 parent fc67c74 commit c2daa95

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Lines changed: 134 additions & 77 deletions

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‎dh/sidh/internal/p751/arith_amd64.s‎

Lines changed: 134 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -1431,44 +1431,58 @@ TEXT ·mulP751(SB), $96-24
14311431
// C points to the place to store the result and should be at least 192 bits.
14321432
// This should only be used when the BMI2 and ADX instruction set extensions
14331433
// are available.
1434-
#define mul256x448bmi2adx(M0, M1, C, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10) \
1434+
#define mul256x448bmi2adx(M0, M1, C, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \
14351435
MOVQ 0+M0, DX \
1436-
MULXQ M1+40(SB), T1, T0 \
1437-
MULXQ M1+48(SB), T3, T2 \
1436+
MOVQ M1+40(SB), AX \
1437+
MULXQ AX, T1, T0 \
1438+
MOVQ M1+48(SB), AX \
1439+
MULXQ AX, T3, T2 \
14381440
MOVQ T1, 0+C \ // C0_final
1439-
XORQ AX, AX \
1440-
MULXQ M1+56(SB), T5, T4 \
1441+
MOVQ M1+56(SB), AX \
1442+
MULXQ AX, T5, T4 \
14411443
ADOXQ T3, T0 \
14421444
ADOXQ T5, T2 \
1443-
MULXQ M1+64(SB), T3, T1 \
1445+
MOVQ M1+64(SB), AX \
1446+
MULXQ AX, T3, T1 \
14441447
ADOXQ T3, T4 \
1445-
MULXQ M1+72(SB), T6, T5 \
1448+
MOVQ M1+72(SB), AX \
1449+
MULXQ AX, T6, T5 \
14461450
ADOXQ T6, T1 \
1447-
MULXQ M1+80(SB), T7, T3 \
1451+
MOVQ M1+80(SB), AX \
1452+
MULXQ AX, T7, T3 \
14481453
ADOXQ T7, T5 \
1449-
MULXQ M1+88(SB), T8, T6 \
1454+
MOVQ M1+88(SB), AX \
1455+
MULXQ AX, T8, T6 \
14501456
ADOXQ T8, T3 \
1457+
MOVL $0, AX \
14511458
ADOXQ AX, T6 \
14521459
\
14531460
MOVQ 8+M0, DX \
1454-
MULXQ M1+40(SB), T7, T8 \
1455-
XORQ AX, AX \
1461+
MOVQ M1+40(SB), AX \
1462+
MULXQ AX, T7, T8 \
14561463
ADCXQ T7, T0 \
14571464
MOVQ T0, 8+C \ // C1_final
14581465
ADCXQ T8, T2 \
1459-
MULXQ M1+48(SB), T8, T7 \
1466+
MOVQ M1+48(SB), AX \
1467+
MULXQ AX, T8, T7 \
14601468
ADOXQ T8, T2 \
14611469
ADCXQ T7, T4 \
1462-
MULXQ M1+56(SB), T8, T0 \
1470+
MOVQ M1+56(SB), AX \
1471+
MULXQ AX, T8, T0 \
14631472
ADOXQ T8, T4 \
14641473
ADCXQ T1, T0 \
1465-
MULXQ M1+64(SB), T7, T1 \
1474+
MOVQ M1+64(SB), AX \
1475+
MULXQ AX, T7, T1 \
14661476
ADCXQ T5, T1 \
1467-
MULXQ M1+72(SB), T8, T5 \
1477+
MOVQ M1+72(SB), AX \
1478+
MULXQ AX, T8, T5 \
14681479
ADCXQ T5, T3 \
1469-
MULXQ M1+80(SB), T9, T5 \
1480+
MOVQ M1+80(SB), AX \
1481+
MULXQ AX, T9, T5 \
14701482
ADCXQ T5, T6 \
1471-
MULXQ M1+88(SB), DX, T5 \
1483+
MOVQ M1+88(SB), AX \
1484+
MULXQ AX, DX, T5 \
1485+
MOVL $0, AX \
14721486
ADCXQ AX, T5 \
14731487
\
14741488
ADOXQ T7, T0 \
@@ -1478,24 +1492,31 @@ TEXT ·mulP751(SB), $96-24
14781492
ADOXQ AX, T5 \
14791493
\
14801494
MOVQ 16+M0, DX \
1481-
MULXQ M1+40(SB), T7, T8 \
1482-
XORQ AX, AX \
1495+
MOVQ M1+40(SB), AX \
1496+
MULXQ AX, T7, T8 \
14831497
ADCXQ T7, T2 \
14841498
MOVQ T2, 16+C \ // C2_final
14851499
ADCXQ T8, T4 \
1486-
MULXQ M1+48(SB), T7, T8 \
1500+
MOVQ M1+48(SB), AX \
1501+
MULXQ AX, T7, T8 \
14871502
ADOXQ T7, T4 \
14881503
ADCXQ T8, T0 \
1489-
MULXQ M1+56(SB), T8, T2 \
1504+
MOVQ M1+56(SB), AX \
1505+
MULXQ AX, T8, T2 \
14901506
ADOXQ T8, T0 \
14911507
ADCXQ T2, T1 \
1492-
MULXQ M1+64(SB), T7, T2 \
1508+
MOVQ M1+64(SB), AX \
1509+
MULXQ AX, T7, T2 \
14931510
ADCXQ T2, T3 \
1494-
MULXQ M1+72(SB), T8, T2 \
1511+
MOVQ M1+72(SB), AX \
1512+
MULXQ AX, T8, T2 \
14951513
ADCXQ T2, T6 \
1496-
MULXQ M1+80(SB), T9, T2 \
1514+
MOVQ M1+80(SB), AX \
1515+
MULXQ AX, T9, T2 \
14971516
ADCXQ T2, T5 \
1498-
MULXQ M1+88(SB), DX, T2 \
1517+
MOVQ M1+88(SB), AX \
1518+
MULXQ AX, DX, T2 \
1519+
MOVL $0, AX \
14991520
ADCXQ AX, T2 \
15001521
\
15011522
ADOXQ T7, T1 \
@@ -1505,26 +1526,33 @@ TEXT ·mulP751(SB), $96-24
15051526
ADOXQ AX, T2 \
15061527
\
15071528
MOVQ 24+M0, DX \
1508-
MULXQ M1+40(SB), T7, T8 \
1509-
XORQ AX, AX \
1529+
MOVQ M1+40(SB), AX \
1530+
MULXQ AX, T7, T8 \
15101531
ADCXQ T4, T7 \
15111532
ADCXQ T8, T0 \
1512-
MULXQ M1+48(SB), T10, T8 \
1513-
ADOXQ T10, T0 \
1533+
MOVQ M1+48(SB), AX \
1534+
MULXQ AX, T9, T8 \
1535+
ADOXQ T9, T0 \
15141536
ADCXQ T8, T1 \
1515-
MULXQ M1+56(SB), T8, T4 \
1537+
MOVQ M1+56(SB), AX \
1538+
MULXQ AX, T8, T4 \
15161539
ADOXQ T8, T1 \
15171540
ADCXQ T4, T3 \
1518-
MULXQ M1+64(SB), T10, T4 \
1541+
MOVQ M1+64(SB), AX \
1542+
MULXQ AX, AX, T4 \
15191543
ADCXQ T4, T6 \
1520-
MULXQ M1+72(SB), T8, T4 \
1544+
ADOXQ AX, T3 \
1545+
MOVQ M1+72(SB), AX \
1546+
MULXQ AX, T8, T4 \
15211547
ADCXQ T4, T5 \
1522-
MULXQ M1+80(SB), T9, T4 \
1548+
MOVQ M1+80(SB), AX \
1549+
MULXQ AX, T9, T4 \
15231550
ADCXQ T4, T2 \
1524-
MULXQ M1+88(SB), DX, T4 \
1551+
MOVQ M1+88(SB), AX \
1552+
MULXQ AX, DX, T4 \
1553+
MOVL $0, AX \
15251554
ADCXQ AX, T4 \
15261555
\
1527-
ADOXQ T10, T3 \
15281556
ADOXQ T8, T6 \
15291557
ADOXQ T9, T5 \
15301558
ADOXQ DX, T2 \
@@ -1535,44 +1563,57 @@ TEXT ·mulP751(SB), $96-24
15351563
// C points to the place to store the result and should be at least 192 bits.
15361564
// This should only be used when the BMI2 instruction set extension is
15371565
// available.
1538-
#define mul256x448bmi2(M0, M1, C, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10) \
1566+
#define mul256x448bmi2(M0, M1, C, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \
15391567
MOVQ 0+M0, DX \
1540-
MULXQ M1+40(SB), T1, T0 \
1541-
MULXQ M1+48(SB), T3, T2 \
1568+
MOVQ M1+40(SB), AX \
1569+
MULXQ AX, T1, T0 \
1570+
MOVQ M1+48(SB), AX \
1571+
MULXQ AX, T3, T2 \
15421572
MOVQ T1, 0+C \ // C0_final
1543-
XORQ AX, AX \
1544-
MULXQ M1+56(SB), T5, T4 \
1573+
MOVQ M1+56(SB), AX \
1574+
MULXQ AX, T5, T4 \
15451575
ADDQ T3, T0 \
15461576
ADCQ T5, T2 \
1547-
MULXQ M1+64(SB), T3, T1 \
1577+
MOVQ M1+64(SB), AX \
1578+
MULXQ AX, T3, T1 \
15481579
ADCQ T3, T4 \
1549-
MULXQ M1+72(SB), T6, T5 \
1580+
MOVQ M1+72(SB), AX \
1581+
MULXQ AX, T6, T5 \
15501582
ADCQ T6, T1 \
1551-
MULXQ M1+80(SB), T7, T3 \
1583+
MOVQ M1+80(SB), AX \
1584+
MULXQ AX, T7, T3 \
15521585
ADCQ T7, T5 \
1553-
MULXQ M1+88(SB), T8, T6 \
1586+
MOVQ M1+88(SB), AX \
1587+
MULXQ AX, T8, T6 \
15541588
ADCQ T8, T3 \
1555-
ADCQ AX, T6 \
1589+
ADCQ $0, T6 \
15561590
\
15571591
MOVQ 8+M0, DX \
1558-
MULXQ M1+40(SB), T7, T8 \
1592+
MOVQ M1+40(SB), AX \
1593+
MULXQ AX, T7, T8 \
15591594
ADDQ T7, T0 \
15601595
MOVQ T0, 8+C \ // C1_final
15611596
ADCQ T8, T2 \
1562-
MULXQ M1+48(SB), T8, T7 \
1597+
MOVQ M1+48(SB), AX \
1598+
MULXQ AX, T8, T7 \
15631599
MOVQ T8, 32+C \
15641600
ADCQ T7, T4 \
1565-
MULXQ M1+56(SB), T8, T0 \
1566-
MOVQ T8, 40+C \
1601+
MOVQ M1+56(SB), AX \
1602+
MULXQ AX, T8, T0 \
1603+
MOVQ T8, 40+C \
15671604
ADCQ T1, T0 \
1568-
MULXQ M1+64(SB), T7, T1 \
1605+
MOVQ M1+64(SB), AX \
1606+
MULXQ AX, T7, T1 \
15691607
ADCQ T5, T1 \
1570-
MULXQ M1+72(SB), T8, T5 \
1608+
MOVQ M1+72(SB), AX \
1609+
MULXQ AX, T8, T5 \
15711610
ADCQ T5, T3 \
1572-
MULXQ M1+80(SB), T9, T5 \
1611+
MOVQ M1+80(SB), AX \
1612+
MULXQ AX, T9, T5 \
15731613
ADCQ T5, T6 \
1574-
MULXQ M1+88(SB), DX, T5 \
1575-
ADCQ AX, T5 \
1614+
MOVQ M1+88(SB), AX \
1615+
MULXQ AX, DX, T5 \
1616+
ADCQ $0, T5 \
15761617
\
15771618
XORQ AX, AX \
15781619
ADDQ 32+C, T2 \
@@ -1584,24 +1625,31 @@ TEXT ·mulP751(SB), $96-24
15841625
ADCQ AX, T5 \
15851626
\
15861627
MOVQ 16+M0, DX \
1587-
MULXQ M1+40(SB), T7, T8 \
1628+
MOVQ M1+40(SB), AX \
1629+
MULXQ AX, T7, T8 \
15881630
ADDQ T7, T2 \
15891631
MOVQ T2, 16+C \ // C2_final
15901632
ADCQ T8, T4 \
1591-
MULXQ M1+48(SB), T7, T8 \
1633+
MOVQ M1+48(SB), AX \
1634+
MULXQ AX, T7, T8 \
15921635
MOVQ T7, 32+C \
15931636
ADCQ T8, T0 \
1594-
MULXQ M1+56(SB), T8, T2 \
1637+
MOVQ M1+56(SB), AX \
1638+
MULXQ AX, T8, T2 \
15951639
MOVQ T8, 40+C \
15961640
ADCQ T2, T1 \
1597-
MULXQ M1+64(SB), T7, T2 \
1641+
MOVQ M1+64(SB), AX \
1642+
MULXQ AX, T7, T2 \
15981643
ADCQ T2, T3 \
1599-
MULXQ M1+72(SB), T8, T2 \
1644+
MOVQ M1+72(SB), AX \
1645+
MULXQ AX, T8, T2 \
16001646
ADCQ T2, T6 \
1601-
MULXQ M1+80(SB), T9, T2 \
1647+
MOVQ M1+80(SB), AX \
1648+
MULXQ AX, T9, T2 \
16021649
ADCQ T2, T5 \
1603-
MULXQ M1+88(SB), DX, T2 \
1604-
ADCQ AX, T2 \
1650+
MOVQ M1+88(SB), AX \
1651+
MULXQ AX, DX, T2 \
1652+
ADCQ $0, T2 \
16051653
\
16061654
XORQ AX, AX \
16071655
ADDQ 32+C, T4 \
@@ -1613,32 +1661,41 @@ TEXT ·mulP751(SB), $96-24
16131661
ADCQ AX, T2 \
16141662
\
16151663
MOVQ 24+M0, DX \
1616-
MULXQ M1+40(SB), T7, T8 \
1664+
MOVQ M1+40(SB), AX \
1665+
MULXQ AX, T7, T8 \
16171666
ADDQ T4, T7 \
1667+
MOVQ T7, 8(SP) /* push T7 */ \
16181668
ADCQ T8, T0 \
1619-
MULXQ M1+48(SB), T10, T8 \
1620-
MOVQ T10, 32+C \
1669+
MOVQ M1+48(SB), AX \
1670+
MULXQ AX, T9, T8 \
1671+
MOVQ T9, 32+C \
16211672
ADCQ T8, T1 \
1622-
MULXQ M1+56(SB), T8, T4 \
1673+
MOVQ M1+56(SB), AX \
1674+
MULXQ AX, T8, T4 \
16231675
MOVQ T8, 40+C \
16241676
ADCQ T4, T3 \
1625-
MULXQ M1+64(SB), T10, T4 \
1677+
MOVQ M1+64(SB), AX \
1678+
MULXQ AX, T7, T4 \
16261679
ADCQ T4, T6 \
1627-
MULXQ M1+72(SB), T8, T4 \
1680+
MOVQ M1+72(SB), AX \
1681+
MULXQ AX, T8, T4 \
16281682
ADCQ T4, T5 \
1629-
MULXQ M1+80(SB), T9, T4 \
1683+
MOVQ M1+80(SB), AX \
1684+
MULXQ AX, T9, T4 \
16301685
ADCQ T4, T2 \
1631-
MULXQ M1+88(SB), DX, T4 \
1632-
ADCQ AX, T4 \
1686+
MOVQ M1+88(SB), AX \
1687+
MULXQ AX, DX, T4 \
1688+
ADCQ $0, T4 \
16331689
\
16341690
XORQ AX, AX \
16351691
ADDQ 32+C, T0 \
16361692
ADCQ 40+C, T1 \
1637-
ADCQ T10, T3 \
1693+
ADCQ T7, T3 \
16381694
ADCQ T8, T6 \
16391695
ADCQ T9, T5 \
16401696
ADCQ DX, T2 \
1641-
ADCQ AX, T4
1697+
ADCQ AX, T4 \
1698+
MOVQ 8(SP), T7 /* pop T7 */
16421699

16431700
// Template for calculating the Montgomery reduction algorithm described in
16441701
// section 5.2.3 of https://eprint.iacr.org/2017/1015.pdf. Template must be
@@ -1651,7 +1708,7 @@ TEXT ·mulP751(SB), $96-24
16511708
// Output: OUT 768-bit
16521709
#define REDC(C, M0, MULS) \
16531710
\ // a[0-3] x p751p1_nz --> result: [reg_p2+48], [reg_p2+56], [reg_p2+64], and rbp, r8:r14
1654-
MULS(M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX, R15) \
1711+
MULS(M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX) \
16551712
XORQ R15, R15 \
16561713
MOVQ 48+C, AX \
16571714
MOVQ 56+C, DX \
@@ -1702,7 +1759,7 @@ TEXT ·mulP751(SB), $96-24
17021759
MOVQ R13, 176+M0 \
17031760
MOVQ R14, 184+M0 \
17041761
\ // a[4-7] x p751p1_nz --> result: [reg_p2+48], [reg_p2+56], [reg_p2+64], and rbp, r8:r14
1705-
MULS(32+M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX, R15) \
1762+
MULS(32+M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX) \
17061763
XORQ R15, R15 \
17071764
MOVQ 48+C, AX \
17081765
MOVQ 56+C, DX \
@@ -1741,7 +1798,7 @@ TEXT ·mulP751(SB), $96-24
17411798
MOVQ R13, 176+M0 \
17421799
MOVQ R14, 184+M0 \
17431800
\ // a[8-11] x p751p1_nz --> result: [reg_p2+48], [reg_p2+56], [reg_p2+64], and rbp, r8:r14
1744-
MULS(64+M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX, R15) \
1801+
MULS(64+M0, ·P751p1, 48+C, R8, R9, R13, R10, R14, R12, R11, BP, BX, CX) \
17451802
MOVQ 48+C, AX \ // Final result c1:c11
17461803
MOVQ 56+C, DX \
17471804
MOVQ 64+C, BX \
@@ -1768,7 +1825,7 @@ TEXT ·mulP751(SB), $96-24
17681825
MOVQ R13, 80+C \
17691826
MOVQ R14, 88+C
17701827

1771-
TEXT ·rdcP751(SB), $8-16
1828+
TEXT ·rdcP751(SB), $16-16
17721829
MOVQ z+0(FP), REG_P2
17731830
MOVQ x+8(FP), REG_P1
17741831

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